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avrinterruptnames.h
1//**************************************************************************************************
2//*
3//* interrupt vector names
4//*
5//* It is important to note that the vector numbers listed here
6//* are the ATMEL documentation numbers. The Arduino numbers are 1 less
7//* This is because the Atmel docs start numbering the interrupts at 1
8//* when it is actually vector #0 in the table.
9//**************************************************************************************************
10//* Jun 1, 2010 <MLS> Added support for ATmega1281
11//* Jun 30, 2010 <MLS> Putting in more ifdefs to conserve space
12//* Jul 3, 2010 <MLS> More #ifdefs to conserve space and testing on most of my boards
13//* Jul 4, 2010 <MLS> Started using vector defs for #ifdefs as defined in <avr/io.h>
14//* Jul 13, 2010 <MLS> Added support for __AVR_ATmega128__
15//* Aug 26, 2010 <MLS> Added support for __AVR_ATmega2561__
16//* Sep 13, 2010 <MLS> Added support for __AVR_AT90CAN32__ __AVR_AT90CAN64__ __AVR_AT90CAN128__
17//**************************************************************************************************
18
19//#include "avrinterruptnames.h"
20
21//**************************************************************************************************
22//* this defines the interrupt vectors and allows us to compile ONLY those strings that are actually
23//* in the target CPU. This way we do not have to keep making changes based on cpu, it will be
24//* automatic even if we add a new CPU
25#ifndef _AVR_IO_H_
26 #include <avr/io.h>
27#endif
28//**************************************************************************************************
29
30#ifdef __MWERKS__
31 #define prog_char char
32 #define PGM_P char *
33#endif
34
35 prog_char gAvrInt_RESET[] PROGMEM = "RESET";
36#ifdef INT0_vect
37 prog_char gAvrInt_INT0[] PROGMEM = "INT0";
38#endif
39#ifdef INT1_vect
40 prog_char gAvrInt_INT1[] PROGMEM = "INT1";
41#endif
42#ifdef INT2_vect
43 prog_char gAvrInt_INT2[] PROGMEM = "INT2";
44#endif
45#ifdef INT3_vect
46 prog_char gAvrInt_INT3[] PROGMEM = "INT3";
47#endif
48#ifdef INT4_vect
49 prog_char gAvrInt_INT4[] PROGMEM = "INT4";
50#endif
51#ifdef INT5_vect
52 prog_char gAvrInt_INT5[] PROGMEM = "INT5";
53#endif
54#ifdef INT6_vect
55 prog_char gAvrInt_INT6[] PROGMEM = "INT6";
56#endif
57#ifdef INT7_vect
58 prog_char gAvrInt_INT7[] PROGMEM = "INT7";
59#endif
60#ifdef PCINT0_vect
61 prog_char gAvrInt_PCINT0[] PROGMEM = "PCINT0";
62#endif
63#ifdef PCINT1_vect
64 prog_char gAvrInt_PCINT1[] PROGMEM = "PCINT1";
65#endif
66#ifdef PCINT2_vect
67 prog_char gAvrInt_PCINT2[] PROGMEM = "PCINT2";
68#endif
69#ifdef PCINT3_vect
70 prog_char gAvrInt_PCINT3[] PROGMEM = "PCINT3";
71#endif
72#ifdef WDT_vect
73 prog_char gAvrInt_WDT[] PROGMEM = "WDT";
74#endif
75#ifdef TIMER0_COMP_vect
76 prog_char gAvrInt_TIMER0_COMP[] PROGMEM = "TIMER0 COMP";
77#endif
78#ifdef TIMER0_COMPA_vect
79 prog_char gAvrInt_TIMER0_COMPA[] PROGMEM = "TIMER0 COMPA";
80#endif
81#ifdef TIMER0_COMPB_vect
82 prog_char gAvrInt_TIMER0_COMPB[] PROGMEM = "TIMER0 COMPB";
83#endif
84#ifdef TIMER0_OVF_vect
85 prog_char gAvrInt_TIMER0_OVF[] PROGMEM = "TIMER0 OVF";
86#endif
87#ifdef TIMER1_CAPT_vect
88 prog_char gAvrInt_TIMER1_CAPT[] PROGMEM = "TIMER1 CAPT";
89#endif
90#ifdef TIMER1_COMPA_vect
91 prog_char gAvrInt_TIMER1_COMPA[] PROGMEM = "TIMER1 COMPA";
92#endif
93#ifdef TIMER1_COMPB_vect
94 prog_char gAvrInt_TIMER1_COMPB[] PROGMEM = "TIMER1 COMPB";
95#endif
96#ifdef TIMER1_COMPC_vect
97 prog_char gAvrInt_TIMER1_COMPC[] PROGMEM = "TIMER1 COMPC";
98#endif
99#ifdef TIMER1_OVF_vect
100 prog_char gAvrInt_TIMER1_OVF[] PROGMEM = "TIMER1 OVF";
101#endif
102#ifdef TIMER2_COMP_vect
103 prog_char gAvrInt_TIMER2_COMP[] PROGMEM = "TIMER2 COMP";
104#endif
105#ifdef TIMER2_COMPA_vect
106 prog_char gAvrInt_TIMER2_COMPA[] PROGMEM = "TIMER2 COMPA";
107#endif
108#ifdef TIMER2_COMPB_vect
109 prog_char gAvrInt_TIMER2_COMPB[] PROGMEM = "TIMER2 COMPB";
110#endif
111#ifdef TIMER2_OVF_vect
112 prog_char gAvrInt_TIMER2_OVF[] PROGMEM = "TIMER2 OVF";
113#endif
114#ifdef TIMER3_CAPT_vect
115 prog_char gAvrInt_TIMER3_CAPT[] PROGMEM = "TIMER3 CAPT";
116#endif
117#ifdef TIMER3_COMPA_vect
118 prog_char gAvrInt_TIMER3_COMPA[] PROGMEM = "TIMER3 COMPA";
119#endif
120#ifdef TIMER3_COMPB_vect
121 prog_char gAvrInt_TIMER3_COMPB[] PROGMEM = "TIMER3 COMPB";
122#endif
123#ifdef TIMER3_COMPC_vect
124 prog_char gAvrInt_TIMER3_COMPC[] PROGMEM = "TIMER3 COMPC";
125#endif
126#ifdef TIMER3_OVF_vect
127 prog_char gAvrInt_TIMER3_OVF[] PROGMEM = "TIMER3 OVF";
128#endif
129#ifdef TIMER4_CAPT_vect
130 prog_char gAvrInt_TIMER4_CAPT[] PROGMEM = "TIMER4 CAPT";
131#endif
132#ifdef TIMER4_COMPA_vect
133 prog_char gAvrInt_TIMER4_COMPA[] PROGMEM = "TIMER4 COMPA";
134#endif
135#ifdef TIMER4_COMPB_vect
136 prog_char gAvrInt_TIMER4_COMPB[] PROGMEM = "TIMER4 COMPB";
137#endif
138#ifdef TIMER4_COMPC_vect
139 prog_char gAvrInt_TIMER4_COMPC[] PROGMEM = "TIMER4 COMPC";
140#endif
141#ifdef TIMER4_COMPD_vect
142 prog_char gAvrInt_TIMER4_COMPD[] PROGMEM = "TIMER4 COMPD";
143#endif
144#ifdef TIMER4_OVF_vect
145 prog_char gAvrInt_TIMER4_OVF[] PROGMEM = "TIMER4 OVF";
146#endif
147#ifdef TIMER4_FPF_vect
148 prog_char gAvrInt_TIMER4_FPF[] PROGMEM = "TIMER4 Fault Protection";
149#endif
150#ifdef TIMER5_CAPT_vect
151 prog_char gAvrInt_TIMER5_CAPT[] PROGMEM = "TIMER5 CAPT";
152#endif
153#ifdef TIMER5_COMPA_vect
154 prog_char gAvrInt_TIMER5_COMPA[] PROGMEM = "TIMER5 COMPA";
155#endif
156#ifdef TIMER5_COMPB_vect
157 prog_char gAvrInt_TIMER5_COMPB[] PROGMEM = "TIMER5 COMPB";
158#endif
159#ifdef TIMER5_COMPC_vect
160 prog_char gAvrInt_TIMER5_COMPC[] PROGMEM = "TIMER5 COMPC";
161#endif
162#ifdef TIMER5_OVF_vect
163 prog_char gAvrInt_TIMER5_OVF[] PROGMEM = "TIMER5 OVF";
164#endif
165
166//* when there is only 1 usart
167#if defined(USART_RX_vect) || defined(USART_RXC_vect)
168 prog_char gAvrInt_USART_RX[] PROGMEM = "USART RX";
169#endif
170#if defined(USART_UDRE_vect)
171 prog_char gAvrInt_USART_UDRE[] PROGMEM = "USART UDRE";
172#endif
173#if defined(USART_TX_vect) || defined(USART_TXC_vect)
174 prog_char gAvrInt_USART_TX[] PROGMEM = "USART TX";
175#endif
176
177
178//* usart 0
179#if defined(USART0_RX_vect)
180 prog_char gAvrInt_USART0_RX[] PROGMEM = "USART0 RX";
181#endif
182#if defined(USART0_UDRE_vect)
183 prog_char gAvrInt_USART0_UDRE[] PROGMEM = "USART0 UDRE";
184#endif
185#if defined(USART0_TX_vect)
186 prog_char gAvrInt_USART0_TX[] PROGMEM = "USART0 TX";
187#endif
188
189
190//* usart 1
191#ifdef USART1_RX_vect
192 prog_char gAvrInt_USART1_RX[] PROGMEM = "USART1 RX";
193#endif
194#ifdef USART1_UDRE_vect
195 prog_char gAvrInt_USART1_UDRE[] PROGMEM = "USART1 UDRE";
196#endif
197#ifdef USART1_TX_vect
198 prog_char gAvrInt_USART1_TX[] PROGMEM = "USART1 TX";
199#endif
200
201//* usart 2
202#ifdef USART2_RX_vect
203 prog_char gAvrInt_USART2_RX[] PROGMEM = "USART2 RX";
204#endif
205#ifdef USART2_UDRE_vect
206 prog_char gAvrInt_USART2_UDRE[] PROGMEM = "USART2 UDRE";
207#endif
208#ifdef USART2_TX_vect
209 prog_char gAvrInt_USART2_TX[] PROGMEM = "USART2 TX";
210#endif
211
212//* usart 3
213#ifdef USART3_RX_vect
214 prog_char gAvrInt_USART3_RX[] PROGMEM = "USART3 RX";
215#endif
216#ifdef USART3_UDRE_vect
217 prog_char gAvrInt_USART3_UDRE[] PROGMEM = "USART3 UDRE";
218#endif
219#ifdef USART3_TX_vect
220 prog_char gAvrInt_USART3_TX[] PROGMEM = "USART3 TX";
221#endif
222#ifdef SPI_STC_vect
223 prog_char gAvrInt_SPI_STC[] PROGMEM = "SPI STC";
224#endif
225#ifdef ADC_vect
226 prog_char gAvrInt_ADC[] PROGMEM = "ADC";
227#endif
228#if defined(ANALOG_COMP_vect) || defined(ANA_COMP_vect)
229 prog_char gAvrInt_ANALOG_COMP[] PROGMEM = "ANALOG COMP";
230#endif
231#if defined(EE_READY_vect) || defined(EE_RDY_vect)
232 prog_char gAvrInt_EE_READY[] PROGMEM = "EE READY";
233#endif
234#ifdef TWI_vect
235 prog_char gAvrInt_TWI[] PROGMEM = "TWI";
236#endif
237#if defined(SPM_READY_vect) || defined(SPM_RDY_vect)
238 prog_char gAvrInt_SPM_READY[] PROGMEM = "SPM READY";
239#endif
240#ifdef USI_START_vect
241 prog_char gAvrInt_USI_START[] PROGMEM = "USI START";
242#endif
243#ifdef USI_OVERFLOW_vect
244 prog_char gAvrInt_USI_OVERFLOW[] PROGMEM = "USI OVERFLOW";
245#endif
246#ifdef USB_GEN_vect
247 prog_char gAvrInt_USB_General[] PROGMEM = "USB General";
248#endif
249#ifdef USB_COM_vect
250 prog_char gAvrInt_USB_Endpoint[] PROGMEM = "USB Endpoint";
251#endif
252
253#ifdef LCD_vect
254 prog_char gAvrInt_LCD_StartFrame[] PROGMEM = "LCD Start of Frame";
255#endif
256
257//* these are for the chips with CAN bus support
258#ifdef CANIT_vect
259 prog_char gAvrInt_CAN_TrafnsferCE[] PROGMEM = "CAN Transfer Complete or Error";
260#endif
261#ifdef OVRIT_vect
262 prog_char gAvrInt_CAN_TimerOverRun[] PROGMEM = "CAN Timer Overrun";
263#endif
264
265//* these are for __AVR_ATmega128RFA1__
266#ifdef TRX24_PLL_LOCK_vect
267 prog_char gAvrInt_TRN_PLL_LOCK[] PROGMEM = "TRX24_PLL_LOCK";
268#endif
269#ifdef TRX24_PLL_UNLOCK_vect
270 prog_char gAvrInt_TRN_PLL_UNLOCK[] PROGMEM = "TRX24_PLL_UNLOCK";
271#endif
272#ifdef TRX24_RX_START_vect
273 prog_char gAvrInt_TRN_RX_START[] PROGMEM = "TRX24_RX_START";
274#endif
275#ifdef TRX24_RX_END_vect
276 prog_char gAvrInt_TRN_RX_END[] PROGMEM = "TRX24_RX_END";
277#endif
278#ifdef TRX24_CCA_ED_DONE_vect
279 prog_char gAvrInt_TRN_CAAED_DONE[] PROGMEM = "TRX24_CCA_ED_DONE";
280#endif
281#ifdef TRX24_XAH_AMI_vect
282 prog_char gAvrInt_TRN_FRAME_MATCH[] PROGMEM = "TRX24_FRAME_ADDRESS_MATCH";
283#endif
284#ifdef TRX24_TX_END_vect
285 prog_char gAvrInt_TRN_TX_END[] PROGMEM = "TRX24_TX_END";
286#endif
287#ifdef TRX24_AWAKE_vect
288 prog_char gAvrInt_TRN_AWAKE[] PROGMEM = "TRX24_AWAKE";
289#endif
290#ifdef SCNT_CMP1_vect
291 prog_char gAvrInt_SCNT_CMP1[] PROGMEM = "SCNT_CMP1";
292#endif
293#ifdef SCNT_CMP2_vect
294 prog_char gAvrInt_SCNT_CMP2[] PROGMEM = "SCNT_CMP2";
295#endif
296#ifdef SCNT_CMP3_vect
297 prog_char gAvrInt_SCNT_CMP3[] PROGMEM = "SCNT_CMP3";
298#endif
299#ifdef SCNT_OVFL_vect
300 prog_char gAvrInt_SCNT_OVFL[] PROGMEM = "SCNT_OVFL";
301#endif
302#ifdef SCNT_BACKOFF_vect
303 prog_char gAvrInt_SCNT_BACKOFF[] PROGMEM = "SCNT_BACKOFF";
304#endif
305#ifdef AES_READY_vect
306 prog_char gAvrInt_AES_READY[] PROGMEM = "AES_READY";
307#endif
308#ifdef BAT_LOW_vect
309 prog_char gAvrInt_BAT_LOW[] PROGMEM = "BAT_LOW";
310#endif
311
312
313
314//**************************************************************************************************
315//* these do not have vector defs and have to be done by CPU type
316#if defined(__AVR_ATmega645__ ) || defined(__AVR_ATmega1281__) || defined(__AVR_ATmega2561__)
317 prog_char gAvrInt_NOT_USED[] PROGMEM = "NOT_USED";
318#endif
319#if defined(__AVR_ATmega32U4__) || defined(__AVR_ATmega128RFA1__)
320 prog_char gAvrInt_RESERVED[] PROGMEM = "Reserved";
321#endif
322
323 prog_char gAvrInt_END[] PROGMEM = "*";
324
325
326
327
328
329//**************************************************************************************************
330#if defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__) || defined(__AVR_ATmega328__)
331#pragma mark __AVR_ATmega168__ / __AVR_ATmega328P__ / __AVR_ATmega328__
332
333#define _INTERRUPT_NAMES_DEFINED_
334
335PGM_P gInterruptNameTable[] PROGMEM =
336{
337
338 gAvrInt_RESET, // 1
339 gAvrInt_INT0, // 2
340 gAvrInt_INT1, // 3
341 gAvrInt_PCINT0, // 4
342 gAvrInt_PCINT1, // 5
343 gAvrInt_PCINT2, // 6
344 gAvrInt_WDT, // 7
345 gAvrInt_TIMER2_COMPA, // 8
346 gAvrInt_TIMER2_COMPB, // 9
347 gAvrInt_TIMER2_OVF, // 10
348 gAvrInt_TIMER1_CAPT, // 11
349 gAvrInt_TIMER1_COMPA, // 12
350 gAvrInt_TIMER1_COMPB, // 13
351 gAvrInt_TIMER1_OVF, // 14
352 gAvrInt_TIMER0_COMPA, // 15
353 gAvrInt_TIMER0_COMPB, // 16
354 gAvrInt_TIMER0_OVF, // 17
355 gAvrInt_SPI_STC, // 18
356 gAvrInt_USART_RX, // 19
357 gAvrInt_USART_UDRE, // 20
358 gAvrInt_USART_TX, // 21
359 gAvrInt_ADC, // 22
360 gAvrInt_EE_READY, // 23
361 gAvrInt_ANALOG_COMP, // 24
362 gAvrInt_TWI, // 25
363 gAvrInt_SPM_READY, // 26
364};
365
366#endif
367
368//**************************************************************************************************
369#if defined(__AVR_ATmega169__)
370#pragma mark __AVR_ATmega169__
371
372#define _INTERRUPT_NAMES_DEFINED_
373
374PGM_P gInterruptNameTable[] PROGMEM =
375{
376
377 gAvrInt_RESET, // 1
378 gAvrInt_INT0, // 2
379 gAvrInt_PCINT0, // 3
380 gAvrInt_PCINT1, // 4
381 gAvrInt_TIMER2_COMP, // 5
382 gAvrInt_TIMER2_OVF, // 6
383 gAvrInt_TIMER1_CAPT, // 7
384 gAvrInt_TIMER1_COMPA, // 8
385 gAvrInt_TIMER1_COMPB, // 9
386 gAvrInt_TIMER1_OVF, // 10
387 gAvrInt_TIMER0_COMP, // 11
388 gAvrInt_TIMER0_OVF, // 12
389 gAvrInt_SPI_STC, // 13
390 gAvrInt_USART0_RX, // 14
391 gAvrInt_USART0_UDRE, // 15
392 gAvrInt_USART0_TX, // 16
393 gAvrInt_USI_START, // 17
394 gAvrInt_USI_OVERFLOW, // 18
395 gAvrInt_ANALOG_COMP, // 19
396 gAvrInt_ADC, // 20
397 gAvrInt_EE_READY, // 21
398 gAvrInt_SPM_READY, // 22
399 gAvrInt_LCD_StartFrame, // 23
400
401};
402
403#endif
404
405
406//**************************************************************************************************
407#if defined(__AVR_ATmega640__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega1281__) || defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__)
408#pragma mark __AVR_ATmega640__ __AVR_ATmega1280__ __AVR_ATmega1281__ __AVR_ATmega2560__ __AVR_ATmega2561__
409
410#define _INTERRUPT_NAMES_DEFINED_
411
412PGM_P gInterruptNameTable[] PROGMEM =
413{
414
415 gAvrInt_RESET, // 1
416 gAvrInt_INT0, // 2
417 gAvrInt_INT1, // 3
418 gAvrInt_INT2, // 4
419 gAvrInt_INT3, // 5
420 gAvrInt_INT4, // 6
421 gAvrInt_INT5, // 7
422 gAvrInt_INT6, // 8
423 gAvrInt_INT7, // 9
424 gAvrInt_PCINT0, // 10
425 gAvrInt_PCINT1, // 11
426#if defined(__AVR_ATmega640__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
427 gAvrInt_PCINT2, // 12
428#else
429 gAvrInt_NOT_USED, // 12
430#endif
431 gAvrInt_WDT, // 13
432 gAvrInt_TIMER2_COMPA, // 14
433 gAvrInt_TIMER2_COMPB, // 15
434 gAvrInt_TIMER2_OVF, // 16
435 gAvrInt_TIMER1_CAPT, // 17
436 gAvrInt_TIMER1_COMPA, // 18
437 gAvrInt_TIMER1_COMPB, // 19
438 gAvrInt_TIMER1_COMPC, // 20
439 gAvrInt_TIMER1_OVF, // 21
440 gAvrInt_TIMER0_COMPA, // 22
441 gAvrInt_TIMER0_COMPB, // 23
442 gAvrInt_TIMER0_OVF, // 24
443 gAvrInt_SPI_STC, // 25
444
445 gAvrInt_USART0_RX, // 26
446 gAvrInt_USART0_UDRE, // 27
447 gAvrInt_USART0_TX, // 28
448 gAvrInt_ANALOG_COMP, // 29
449 gAvrInt_ADC, // 30
450 gAvrInt_EE_READY, // 31
451
452 gAvrInt_TIMER3_CAPT, // 32
453 gAvrInt_TIMER3_COMPA, // 33
454 gAvrInt_TIMER3_COMPB, // 34
455 gAvrInt_TIMER3_COMPC, // 35
456 gAvrInt_TIMER3_OVF, // 36
457
458 gAvrInt_USART1_RX, // 37
459 gAvrInt_USART1_UDRE, // 38
460 gAvrInt_USART1_TX, // 39
461 gAvrInt_TWI, // 40
462 gAvrInt_SPM_READY, // 41
463#if defined(__AVR_ATmega640__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
464 gAvrInt_TIMER4_CAPT, // 42
465#else
466 gAvrInt_NOT_USED, // 42
467#endif
468 gAvrInt_TIMER4_COMPA, // 43
469 gAvrInt_TIMER4_COMPB, // 44
470 gAvrInt_TIMER4_COMPC, // 45
471 gAvrInt_TIMER4_OVF, // 46
472#if defined(__AVR_ATmega640__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
473 gAvrInt_TIMER5_CAPT, // 47
474#else
475 gAvrInt_NOT_USED, // 47
476#endif
477 gAvrInt_TIMER5_COMPA, // 48
478 gAvrInt_TIMER5_COMPB, // 49
479 gAvrInt_TIMER5_COMPC, // 50
480 gAvrInt_TIMER5_OVF, // 51
481
482#if defined(__AVR_ATmega640__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
483 gAvrInt_USART2_RX, // 52
484 gAvrInt_USART2_UDRE, // 53
485 gAvrInt_USART2_TX, // 54
486
487 gAvrInt_USART3_RX, // 55
488 gAvrInt_USART3_UDRE, // 56
489 gAvrInt_USART3_TX, // 57
490#endif
491
492};
493
494#endif
495
496
497
498//**************************************************************************************************
499#if defined(__AVR_ATmega324P__ ) || defined(__AVR_ATmega644__ ) || defined(__AVR_ATmega644P__) || defined(__AVR_ATmega1284P__)
500#pragma mark __AVR_ATmega324P__ __AVR_ATmega644__ __AVR_ATmega644P__ __AVR_ATmega1284P__
501
502#define _INTERRUPT_NAMES_DEFINED_
503
504PGM_P gInterruptNameTable[] PROGMEM =
505{
506
507 gAvrInt_RESET, // 1
508 gAvrInt_INT0, // 2
509 gAvrInt_INT1, // 3
510 gAvrInt_INT2, // 4
511 gAvrInt_PCINT0, // 5
512 gAvrInt_PCINT1, // 6
513 gAvrInt_PCINT2, // 7
514 gAvrInt_PCINT3, // 8
515 gAvrInt_WDT, // 9
516 gAvrInt_TIMER2_COMPA, // 10
517 gAvrInt_TIMER2_COMPB, // 11
518 gAvrInt_TIMER2_OVF, // 12
519 gAvrInt_TIMER1_CAPT, // 13
520 gAvrInt_TIMER1_COMPA, // 14
521 gAvrInt_TIMER1_COMPB, // 15
522 gAvrInt_TIMER1_OVF, // 16
523 gAvrInt_TIMER0_COMPA, // 17
524 gAvrInt_TIMER0_COMPB, // 18
525 gAvrInt_TIMER0_OVF, // 19
526 gAvrInt_SPI_STC, // 20
527 gAvrInt_USART0_RX, // 21
528 gAvrInt_USART0_UDRE, // 22
529 gAvrInt_USART0_TX, // 23
530 gAvrInt_ANALOG_COMP, // 24
531 gAvrInt_ADC, // 25
532 gAvrInt_EE_READY, // 26
533 gAvrInt_TWI, // 27
534 gAvrInt_SPM_READY, // 28
535
536#if defined(__AVR_ATmega324P__ ) || defined(__AVR_ATmega644P__)
537 gAvrInt_USART1_RX, // 29
538 gAvrInt_USART1_UDRE, // 30
539 gAvrInt_USART1_TX, // 31
540#endif
541
542};
543
544
545#endif
546
547//**************************************************************************************************
548#if defined(__AVR_ATmega1284P__ )
549#pragma mark __AVR_ATmega1284P__
550
551#define _INTERRUPT_NAMES_DEFINED_
552
553PGM_P gInterruptNameTable[] PROGMEM =
554{
555
556 gAvrInt_RESET, // 1
557 gAvrInt_INT0, // 2
558 gAvrInt_INT1, // 3
559 gAvrInt_INT2, // 4
560 gAvrInt_PCINT0, // 5
561 gAvrInt_PCINT1, // 6
562 gAvrInt_PCINT2, // 7
563 gAvrInt_PCINT3, // 8
564 gAvrInt_WDT, // 9
565 gAvrInt_TIMER2_COMPA, // 10
566 gAvrInt_TIMER2_COMPB, // 11
567 gAvrInt_TIMER2_OVF, // 12
568 gAvrInt_TIMER1_CAPT, // 13
569 gAvrInt_TIMER1_COMPA, // 14
570 gAvrInt_TIMER1_COMPB, // 15
571 gAvrInt_TIMER1_OVF, // 16
572 gAvrInt_TIMER0_COMPA, // 17
573 gAvrInt_TIMER0_COMPB, // 18
574 gAvrInt_TIMER0_OVF, // 19
575 gAvrInt_SPI_STC, // 20
576 gAvrInt_USART0_RX, // 21
577 gAvrInt_USART0_UDRE, // 22
578 gAvrInt_USART0_TX, // 23
579 gAvrInt_ANALOG_COMP, // 24
580 gAvrInt_ADC, // 25
581 gAvrInt_EE_READY, // 26
582 gAvrInt_TWI, // 27
583 gAvrInt_SPM_READY, // 28
584
585 gAvrInt_USART1_RX, // 29
586 gAvrInt_USART1_UDRE, // 30
587 gAvrInt_USART1_TX, // 31
588 //* these are NOT documented in doc8272.pdf
589 //* they are in iom1284p.h
590 gAvrInt_TIMER3_CAPT, // 32
591 gAvrInt_TIMER3_COMPA, // 33
592 gAvrInt_TIMER3_COMPB, // 34
593 gAvrInt_TIMER3_OVF, // 35
594
595
596};
597
598
599#endif
600
601
602//**************************************************************************************************
603#if defined(__AVR_ATmega645__ )
604#pragma mark __AVR_ATmega645__
605
606#define _INTERRUPT_NAMES_DEFINED_
607
608PGM_P gInterruptNameTable[] PROGMEM =
609{
610
611 gAvrInt_RESET, // 1
612 gAvrInt_INT0, // 2
613 gAvrInt_PCINT0, // 3
614 gAvrInt_PCINT1, // 4
615 gAvrInt_TIMER2_COMP, // 5
616 gAvrInt_TIMER2_OVF, // 6
617 gAvrInt_TIMER1_CAPT, // 7
618 gAvrInt_TIMER1_COMPA, // 8
619 gAvrInt_TIMER1_COMPB, // 9
620 gAvrInt_TIMER1_OVF, // 10
621 gAvrInt_TIMER0_COMP, // 11
622 gAvrInt_TIMER0_OVF, // 12
623 gAvrInt_SPI_STC, // 13
624 gAvrInt_USART0_RX, // 14
625 gAvrInt_USART0_UDRE, // 15
626 gAvrInt_USART0_TX, // 16
627 gAvrInt_USI_START, // 17
628 gAvrInt_USI_OVERFLOW, // 18
629 gAvrInt_ANALOG_COMP, // 19
630 gAvrInt_ADC, // 20
631 gAvrInt_EE_READY, // 21
632 gAvrInt_SPM_READY, // 22
633 gAvrInt_NOT_USED, // 23
634
635#if defined(__AVR_ATmega3250__) || defined(__AVR_ATmega6450__)
636 gAvrInt_PCINT2, // 24
637 gAvrInt_PCINT3, // 25
638#endif
639};
640
641
642#endif
643
644//**************************************************************************************************
645#if defined(__AVR_ATmega16__ )
646#pragma mark __AVR_ATmega16__
647
648#define _INTERRUPT_NAMES_DEFINED_
649
650PGM_P gInterruptNameTable[] PROGMEM =
651{
652
653 gAvrInt_RESET, // 1
654 gAvrInt_INT0, // 2
655 gAvrInt_INT1, // 3
656 gAvrInt_TIMER2_COMP, // 4
657 gAvrInt_TIMER2_OVF, // 5
658 gAvrInt_TIMER1_CAPT, // 6
659 gAvrInt_TIMER1_COMPA, // 7
660 gAvrInt_TIMER1_COMPB, // 8
661 gAvrInt_TIMER1_OVF, // 9
662 gAvrInt_TIMER0_OVF, // 10
663 gAvrInt_SPI_STC, // 11
664 gAvrInt_USART_RX, // 12
665 gAvrInt_USART_UDRE, // 13
666 gAvrInt_USART_TX, // 14
667 gAvrInt_ADC, // 15
668 gAvrInt_EE_READY, // 16
669 gAvrInt_ANALOG_COMP, // 17
670 gAvrInt_TWI, // 18
671 gAvrInt_INT2, // 19
672 gAvrInt_TIMER0_COMP, // 20
673 gAvrInt_SPM_READY, // 21
674
675};
676
677
678#endif
679
680//**************************************************************************************************
681#if defined(__AVR_ATmega32__ )
682#pragma mark __AVR_ATmega32__
683
684#define _INTERRUPT_NAMES_DEFINED_
685
686PGM_P gInterruptNameTable[] PROGMEM =
687{
688
689 gAvrInt_RESET, // 1
690 gAvrInt_INT0, // 2
691 gAvrInt_INT1, // 3
692 gAvrInt_INT2, // 4
693 gAvrInt_TIMER2_COMP, // 5
694 gAvrInt_TIMER2_OVF, // 6
695 gAvrInt_TIMER1_CAPT, // 7
696 gAvrInt_TIMER1_COMPA, // 8
697 gAvrInt_TIMER1_COMPB, // 9
698 gAvrInt_TIMER1_OVF, // 10
699 gAvrInt_TIMER0_COMP, // 11
700 gAvrInt_TIMER0_OVF, // 12
701 gAvrInt_SPI_STC, // 13
702 gAvrInt_USART_RX, // 14
703 gAvrInt_USART_UDRE, // 15
704 gAvrInt_USART_TX, // 16
705 gAvrInt_ADC, // 17
706 gAvrInt_EE_READY, // 18
707 gAvrInt_ANALOG_COMP, // 19
708 gAvrInt_TWI, // 20
709 gAvrInt_SPM_READY, // 21
710
711};
712
713
714#endif
715
716//**************************************************************************************************
717#if defined(__AVR_ATmega32U4__)
718#pragma mark __AVR_ATmega32U4__
719//* teensy 2.0
720//* http://www.pjrc.com/teensy/pinout.html
721#define _INTERRUPT_NAMES_DEFINED_
722
723
724PGM_P gInterruptNameTable[] PROGMEM =
725{
726
727 gAvrInt_RESET, // 1
728 gAvrInt_INT0, // 2
729 gAvrInt_INT1, // 3
730 gAvrInt_INT2, // 4
731 gAvrInt_INT3, // 5
732 gAvrInt_RESERVED, // 6
733 gAvrInt_RESERVED, // 7
734 gAvrInt_INT6, // 8
735 gAvrInt_RESERVED, // 9
736 gAvrInt_PCINT0, // 10
737 gAvrInt_USB_General, // 11
738 gAvrInt_USB_Endpoint, // 12
739 gAvrInt_WDT, // 13
740 gAvrInt_RESERVED, // 14
741 gAvrInt_RESERVED, // 15
742 gAvrInt_RESERVED, // 16
743 gAvrInt_TIMER1_CAPT, // 17
744 gAvrInt_TIMER1_COMPA, // 18
745 gAvrInt_TIMER1_COMPB, // 19
746 gAvrInt_TIMER1_COMPC, // 20
747 gAvrInt_TIMER1_OVF, // 21
748 gAvrInt_TIMER0_COMPA, // 22
749 gAvrInt_TIMER0_COMPB, // 23
750 gAvrInt_TIMER0_OVF, // 24
751 gAvrInt_SPI_STC, // 25
752
753 gAvrInt_USART1_RX, // 26
754 gAvrInt_USART1_UDRE, // 27
755 gAvrInt_USART1_TX, // 28
756 gAvrInt_ANALOG_COMP, // 29
757
758 gAvrInt_ADC, // 30
759 gAvrInt_EE_READY, // 31
760
761 gAvrInt_TIMER3_CAPT, // 32
762 gAvrInt_TIMER3_COMPA, // 33
763 gAvrInt_TIMER3_COMPB, // 34
764 gAvrInt_TIMER3_COMPC, // 35
765 gAvrInt_TIMER3_OVF, // 36
766 gAvrInt_TWI, // 37
767 gAvrInt_SPM_READY, // 38
768
769 gAvrInt_TIMER4_COMPA, // 39
770 gAvrInt_TIMER4_COMPB, // 40
771 gAvrInt_TIMER4_COMPD, // 41
772 gAvrInt_TIMER4_OVF, // 42
773 gAvrInt_TIMER4_FPF, // 43
774};
775
776#endif
777
778//**************************************************************************************************
779#if defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB1287__)
780#pragma mark __AVR_AT90USB1286__
781//* teensy++ 2.0
782//* http://www.pjrc.com/teensy/pinout.html
783#define _INTERRUPT_NAMES_DEFINED_
784
785
786PGM_P gInterruptNameTable[] PROGMEM =
787{
788
789 gAvrInt_RESET, // 1
790 gAvrInt_INT0, // 2
791 gAvrInt_INT1, // 3
792 gAvrInt_INT2, // 4
793 gAvrInt_INT3, // 5
794 gAvrInt_INT4, // 6
795 gAvrInt_INT5, // 7
796 gAvrInt_INT6, // 8
797 gAvrInt_INT7, // 9
798 gAvrInt_PCINT0, // 10
799 gAvrInt_USB_General, // 11
800 gAvrInt_USB_Endpoint, // 12
801 gAvrInt_WDT, // 13
802 gAvrInt_TIMER2_COMPA, // 14
803 gAvrInt_TIMER2_COMPB, // 15
804 gAvrInt_TIMER2_OVF, // 16
805 gAvrInt_TIMER1_CAPT, // 17
806 gAvrInt_TIMER1_COMPA, // 18
807 gAvrInt_TIMER1_COMPB, // 19
808 gAvrInt_TIMER1_COMPC, // 20
809 gAvrInt_TIMER1_OVF, // 21
810 gAvrInt_TIMER0_COMPA, // 22
811 gAvrInt_TIMER0_COMPB, // 23
812 gAvrInt_TIMER0_OVF, // 24
813 gAvrInt_SPI_STC, // 25
814
815 gAvrInt_USART1_RX, // 26
816 gAvrInt_USART1_UDRE, // 27
817 gAvrInt_USART1_TX, // 28
818 gAvrInt_ANALOG_COMP, // 29
819
820 gAvrInt_ADC, // 30
821 gAvrInt_EE_READY, // 31
822
823 gAvrInt_TIMER3_CAPT, // 32
824 gAvrInt_TIMER3_COMPA, // 33
825 gAvrInt_TIMER3_COMPB, // 34
826 gAvrInt_TIMER3_COMPC, // 35
827 gAvrInt_TIMER3_OVF, // 36
828 gAvrInt_TWI, // 37
829 gAvrInt_SPM_READY, // 38
830
831};
832
833#endif
834
835
836
837
838//**************************************************************************************************
839#if defined(__AVR_ATmega128__) || defined(__AVR_ATmega64__)
840#pragma mark __AVR_ATmega64__ __AVR_ATmega128__
841#define _INTERRUPT_NAMES_DEFINED_
842
843
844PGM_P gInterruptNameTable[] PROGMEM =
845{
846
847 gAvrInt_RESET, // 1
848 gAvrInt_INT0, // 2
849 gAvrInt_INT1, // 3
850 gAvrInt_INT2, // 4
851 gAvrInt_INT3, // 5
852 gAvrInt_INT4, // 6
853 gAvrInt_INT5, // 7
854 gAvrInt_INT6, // 8
855 gAvrInt_INT7, // 9
856 gAvrInt_TIMER2_COMP, // 10
857 gAvrInt_TIMER2_OVF, // 11
858 gAvrInt_TIMER1_CAPT, // 12
859 gAvrInt_TIMER1_COMPA, // 13
860 gAvrInt_TIMER1_COMPB, // 14
861 gAvrInt_TIMER1_OVF, // 15
862 gAvrInt_TIMER0_COMP, // 16
863 gAvrInt_TIMER0_OVF, // 17
864 gAvrInt_SPI_STC, // 18
865 gAvrInt_USART0_RX, // 19
866 gAvrInt_USART0_UDRE, // 20
867 gAvrInt_USART0_TX, // 21
868 gAvrInt_ADC, // 22
869 gAvrInt_EE_READY, // 23
870 gAvrInt_ANALOG_COMP, // 24
871 gAvrInt_TIMER1_COMPC, // 25
872 gAvrInt_TIMER3_CAPT, // 26
873 gAvrInt_TIMER3_COMPA, // 27
874 gAvrInt_TIMER3_COMPB, // 28
875 gAvrInt_TIMER3_COMPC, // 29
876 gAvrInt_TIMER3_OVF, // 30
877 gAvrInt_USART1_RX, // 31
878 gAvrInt_USART1_UDRE, // 32
879 gAvrInt_USART1_TX, // 33
880 gAvrInt_TWI, // 34
881 gAvrInt_SPM_READY, // 35
882
883};
884
885#endif
886
887//**************************************************************************************************
888#if defined(__AVR_AT90CAN32__) || defined(__AVR_AT90CAN64__) || defined(__AVR_AT90CAN128__)
889#pragma mark __AVR_AT90CAN32__ __AVR_AT90CAN64__ __AVR_AT90CAN128__
890
891#define _INTERRUPT_NAMES_DEFINED_
892
893PGM_P gInterruptNameTable[] PROGMEM =
894{
895
896 gAvrInt_RESET, // 1
897 gAvrInt_INT0, // 2
898 gAvrInt_INT1, // 3
899 gAvrInt_INT2, // 4
900 gAvrInt_INT3, // 5
901 gAvrInt_INT4, // 6
902 gAvrInt_INT5, // 7
903 gAvrInt_INT6, // 8
904 gAvrInt_INT7, // 9
905 gAvrInt_TIMER2_COMP, // 10
906 gAvrInt_TIMER2_OVF, // 11
907 gAvrInt_TIMER1_CAPT, // 12
908 gAvrInt_TIMER1_COMPA, // 13
909 gAvrInt_TIMER1_COMPB, // 14
910 gAvrInt_TIMER1_COMPC, // 15
911 gAvrInt_TIMER1_OVF, // 16
912 gAvrInt_TIMER0_COMP, // 17
913 gAvrInt_TIMER0_OVF, // 18
914 gAvrInt_CAN_TrafnsferCE, // 19
915 gAvrInt_CAN_TimerOverRun, // 20
916 gAvrInt_SPI_STC, // 21
917 gAvrInt_USART0_RX, // 22
918 gAvrInt_USART0_UDRE, // 23
919 gAvrInt_USART0_TX, // 24
920 gAvrInt_ANALOG_COMP, // 25
921 gAvrInt_ADC, // 26
922 gAvrInt_EE_READY, // 27
923 gAvrInt_TIMER3_CAPT, // 28
924 gAvrInt_TIMER3_COMPA, // 29
925 gAvrInt_TIMER3_COMPB, // 30
926 gAvrInt_TIMER3_COMPC, // 31
927 gAvrInt_TIMER3_OVF, // 32
928 gAvrInt_USART1_RX, // 33
929 gAvrInt_USART1_UDRE, // 34
930 gAvrInt_USART1_TX, // 35
931 gAvrInt_TWI, // 36
932 gAvrInt_SPM_READY, // 37
933};
934
935#endif
936
937//**************************************************************************************************
938#if defined (__AVR_ATmega128RFA1__)
939#pragma mark __AVR_ATmega128RFA1__
940#define _INTERRUPT_NAMES_DEFINED_
941
942PGM_P gInterruptNameTable[] PROGMEM =
943{
944 //* Atmel changed the number scheme for interrupt vectors
945 gAvrInt_RESET, // 0
946 gAvrInt_INT0, // 1
947 gAvrInt_INT1, // 2
948 gAvrInt_INT2, // 3
949 gAvrInt_INT3, // 4
950 gAvrInt_INT4, // 5
951 gAvrInt_INT5, // 6
952 gAvrInt_INT6, // 7
953 gAvrInt_INT7, // 8
954 gAvrInt_PCINT0, // 9
955 gAvrInt_PCINT1, // 10
956 gAvrInt_PCINT2, // 11
957 gAvrInt_WDT, // 12
958 gAvrInt_TIMER2_COMPA, // 13
959 gAvrInt_TIMER2_COMPB, // 14
960 gAvrInt_TIMER2_OVF, // 15
961 gAvrInt_TIMER1_CAPT, // 16
962 gAvrInt_TIMER1_COMPA, // 17
963 gAvrInt_TIMER1_COMPB, // 18
964 gAvrInt_TIMER1_COMPC, // 19
965 gAvrInt_TIMER1_OVF, // 20
966 gAvrInt_TIMER0_COMPA, // 21
967 gAvrInt_TIMER0_COMPB, // 22
968 gAvrInt_TIMER0_OVF, // 23
969 gAvrInt_SPI_STC, // 24
970 gAvrInt_USART0_RX, // 25
971 gAvrInt_USART0_UDRE, // 26
972 gAvrInt_USART0_TX, // 27
973 gAvrInt_ANALOG_COMP, // 28
974 gAvrInt_ADC, // 29
975 gAvrInt_EE_READY, // 30
976 gAvrInt_TIMER3_CAPT, // 31
977 gAvrInt_TIMER3_COMPA, // 32
978 gAvrInt_TIMER3_COMPB, // 33
979 gAvrInt_TIMER3_COMPC, // 34
980 gAvrInt_TIMER3_OVF, // 35
981 gAvrInt_USART1_RX, // 36
982 gAvrInt_USART1_UDRE, // 37
983 gAvrInt_USART1_TX, // 38
984 gAvrInt_TWI, // 39
985 gAvrInt_SPM_READY, // 40
986 gAvrInt_TIMER4_CAPT, // 41
987 gAvrInt_TIMER4_COMPA, // 42
988 gAvrInt_TIMER4_COMPB, // 43
989 gAvrInt_TIMER4_COMPC, // 44
990 gAvrInt_TIMER4_OVF, // 45
991 gAvrInt_TIMER5_CAPT, // 46
992 gAvrInt_TIMER5_COMPA, // 47
993 gAvrInt_TIMER5_COMPB, // 48
994 gAvrInt_TIMER5_COMPC, // 49
995 gAvrInt_TIMER5_OVF, // 50
996#if 1
997 gAvrInt_RESERVED, // 51
998 gAvrInt_RESERVED, // 52
999 gAvrInt_RESERVED, // 53
1000
1001 gAvrInt_RESERVED, // 54
1002 gAvrInt_RESERVED, // 55
1003 gAvrInt_RESERVED, // 56
1004
1005#else
1006 gAvrInt_USART2_RX, // 51
1007 gAvrInt_USART2_UDRE, // 52
1008 gAvrInt_USART2_TX, // 53
1009
1010 gAvrInt_USART3_RX, // 54
1011 gAvrInt_USART3_UDRE, // 55
1012 gAvrInt_USART3_TX, // 56
1013#endif
1014 gAvrInt_TRN_PLL_LOCK, // 57
1015 gAvrInt_TRN_PLL_UNLOCK, // 58
1016 gAvrInt_TRN_RX_START, // 59
1017 gAvrInt_TRN_RX_END, // 60
1018 gAvrInt_TRN_CAAED_DONE, // 61
1019 gAvrInt_TRN_FRAME_MATCH,// 62
1020 gAvrInt_TRN_TX_END, // 63
1021 gAvrInt_TRN_AWAKE, // 64
1022
1023 gAvrInt_SCNT_CMP1, // 65
1024 gAvrInt_SCNT_CMP2, // 66
1025 gAvrInt_SCNT_CMP3, // 67
1026 gAvrInt_SCNT_OVFL, // 68
1027 gAvrInt_SCNT_BACKOFF, // 69
1028 gAvrInt_AES_READY, // 70
1029 gAvrInt_BAT_LOW, // 71
1030
1031
1032};
1033
1034#endif
1035
1036
1037#if !defined(_INTERRUPT_NAMES_DEFINED_)
1038 #warning No interrupt string defs for this cpu
1039#endif
1040